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2D Electronics – Opportunities and Challenges

September 6, 2019 @ 3:00 pm - 4:00 pm

Co-sponsored by: Columbia EE

During the past decade, 2D (two-dimensional) materials have attracted enormous attention from various scientific communities ranging from chemists and physicists to material scientists and device engineers. The rise of the 2D materials began in 2004 with the work on graphene done at Manchester University and Georgia Tech. Particularly the observed high carrier mobilities raised early expectations that graphene could be a perfect electronic material. It soon became clear, however, that due its zero bandgap graphene is not suitable for most electronic devices, in particular transistors. On the other hand, researchers have extended their work to 2D materials beyond graphene and the number of 2D materials under investigation is continuously rising. Many of these materials possess sizeable bandgaps and therefore may be useful for transistors. Indeed, the progress of research on 2D transistors has been rapid and experimental MOSFETs with semiconducting 2D channels have been demonstrated by many groups. A recent achievement was the demonstration of a 1-nm gate MoS2 MOSFET in 2016. On the other hand, and in spite of the progress in the field, the debate on the actual prospects of 2D materials for future electronics is still controversial.

In the present lecture, the most important classes of 2D materials are introduced and the potential of 2D transistors is assessed as realistically as possible. To this end, two key material properties – bandgap and mobility – are examined in detail and the mobility- bandgap tradeoff is discussed. The state of the art of 2D transistors is reviewed by summarizing relevant results of leading groups in the field, by presenting examples of the lecturer’s own work on 2D electronics, and by comparing the performance of 2D transistors to that of competing conventional transistors. Based on these considerations, a balanced view of both the pros and cons of 2D transistors is provided and their potential in both digital CMOS and other domains of semiconductor electronics is discussed. It is shown that due to the rather conservative CMOS scaling scenarios described in the most recent ITRS and IRDS editions (compared to the more aggressive scenarios of previous ITRS editions) it will be difficult for 2D materials to make inroads into mainstream CMOS. However, research on beyond-CMOS 2D devices has led to promising results. Exemplarily, the status and prospects of 2D sensors and 2D memristors is discussed.

Sponsored by: Columbia University EE and the New York IEEE EDS/SSCS Joint Chapter

Speaker(s): Frank Schwierz,

Location:
Room: 1300
Bldg: Seeley W. Mudd Building
500 W 120TH ST
Columbia Engineering
New York, New York
10027

Details

Date:: September 6, 2019
Time:: 3:00 pm - 4:00 pm
Website:: http://events.vtools.ieee.org/m/204166

Venue

: Room: 1300, Bldg: Seeley W. Mudd Building

Organizer

: [email protected]