Speaker: Prof. Eckart Hoene
Date: September 24th 2020 at 11:30am ET
Abstract: Routing power electronic circuits for high-speed switching becomes very tricky, as parasitic effects gain relevance and influence system performance significantly. For example, some parts of the circuit have to be routed with low inductance, others for low coupling capacitance, proximity effects dominate losses, and so on. Although there are tools to calculate these kinds of effects it is not straight forward to use them during the design process. The transfer of the layout data to the calculation tool works seldom without rework and the tools need special knowledge to get the right results. Layout tool integrated evaluation features may offer a way out of this obstruction.In the webinar, the performance relevant parasitics are gathered and ways to handle them in layout tools discussed. Solutions for ohmic losses in arbitrarily formed tracks and inductance are demonstrated.
Bio: Dr. Eckart Hoene received his M.S. degree in electrical engineering from Technical University (TU) Berlin, Germany, in 1997. He received his Ph.D. degree on the topic “ EMC of drive systems” from TU Berlin in 2001. He joined the Fraunhofer Institute for Reliability and Micro Integration, Berlin, as a scientific assistant and worked toward his Ph.D. degree simultaneously. He continued at Fraunhofer as a postdoc, group leader, and business development manager. In 2014, he became an adjunct professor at Aalborg University, Denmark, in addition to the courses he chairs for the European Center for Power Electronics and his Fraunhofer affiliation. The technical focus of his work is high switching frequencies in power electronics, packaging semiconductors, and electromagnetic compatibility. His group works mainly under contract with industry customers. He holds more than ten patents and is regularly invited to speak at conferences.