Preliminary Program

All times are listed in Puebla, México local time (UTC -5)

MOS-AK Workshop

9:00-13:00MOS-AK/LAEDC Workshop
T_0MOS-AK Workshop Opening
Benjamin Iñiguez, Roberto Murphy and Wladek Grabinski
MOS-AK is HiTech forum to discuss the frontiers of electron device modeling with emphasis on simulation-aware compact/SPICE models and its Verilog-A standardization. The specific workshop goal will be to classify the most important directions for the future development of the electron device models, not limiting the discussion to compact models, but including physical, analytical and numerical models, to clearly identify areas that need further research and possible contact points between the different modeling domains. This workshop is designed for device process engineers (CMOS, SOI, BiCMOS, SiGe, GaN, InP) who are interested in device modeling; ICs designers (RF/Analog/Mixed-Signal/SoC/Bio/Med) and those starting in that area as well as device characterization, modeling and parameter extraction engineers. The content will be beneficial for anyone who needs to learn what is really behind the IC simulation in modern device models.
9:00-11:00MOS-AK Workshop Session (I)
T_1 FETs as detectors of THz radiation
Daniel Tomaszewski
IMiF, Warszawa (PL)
T_2 Capacitance modelling of a transistor for RF Power Amplifiers in 5G applications.
Nagaditya Poluri and M. M. De Souza
Uni. Sheffield (UK)
High efficiency modes such as continuum modes rely on the harmonic manipulation of the waveforms in power amplifiers to improve efficiency, output power and robustness against impedance mismatch. Their design benefits from accurate modelling of capacitances in the knee region of the transistor, which may not be easy to extract from measurement due to noise and uncertainty. A table-based model typically has to rely on interpolation and extrapolation for such bias points to ensure a continuous and differentiable behaviour. In this work, we propose a polynomial-based model which satisfies charge conservation at the gate terminal. This model can be used directly for Volterra based analysis to quantify the distortion from capacitors and to find cancellation mechanisms for the feedback capacitance, which is a problem especially for CMOS based amplifiers in 5G applications.
T_3 MOSFET mismatch characterization made easier: a 2-Transistor test array structure for a voltage-only measurement approach
Juan Brito* and Sergio Bampi**
MOSFET mismatch measurements and characterization are repetitive tasks that require a huge amount of measurements, testing time, and data post-processing. In this presentation, an array test structure and a measurement method are proposed. They extraordinarily improve mismatch measurement time with a reduced equipment setup, while maintaining a high statistical confidence level. The structure is based on the combination of two stacked MOS transistors and the measurement methodology relies on just two single DC voltage measurements. With a theoretical speed improvement of 30x, the method enables fast extraction of MOSFET mismatch parameters, useful to designers, such as AVTH and Aβ with less than 2% error. The data correlation coefficient between the traditional and the proposed method is not less than 0.94, obtained in bulk CMOS test chips, thus confirming the high statistical confidence of the extraction method.
T_4 Further considerations for RF CMOS compact modeling
Roberto Murphy
INAOE, Puebla (MX)
Compact modeling of CMOS devices has advanced day by day in the last few decades, keeping abreast with the technological development of manufacturing processes with ever smaller minimum features. These advances have made it possible to design and built circuits for operation in high frequencies, reaching into the hundreds of GHz. Notwithstanding, as the frequency of operation increases, several second-order effects become apparent, and it is important to consider them at the design table in order to obtain more reliable simulations. Some of these have to do with parasitic effects of the interconnect lines; effects associated with inductors; connectors; and the like. Furthermore, higher operating frequencies make it possible to include antennas on-chip for a host of applications, but compact modeles for these have not been satisfactorily developed. This talk aims at presenting some of these considerations raising awareness of their importance in the modeling of RF CMOS circuits.
11:00-11:30Coffee break
11:30-13:00MOS-AK Workshop Session (II)
T_5 Compact modeling for TMD FETs
Benjamin Iñiguez
Compared to graphene, TMD materials offer the advantage of having the semiconductor properties which allow them to be used as essential components in logic integrated circuits. The small thickness for TMD semiconductors enables the ultimate scalability in FETs, due to a higher gate electrostatic controllability over the channel. To use those new devices in VLSI circuits, compact design-oriented models need to be developed. We review the physics of different structures of TMD FETs and aproaches to develop analytical equations of the I-V and C-V characteristics
T_6 On the Compact Modelling of Si Nanowire and Si Nanosheet MOSFETs
Antonio Cerdeira, Magali Estrada, Marcelo A. Pavanello
Nanowire and Nanosheet MOSFET devices also require precise analytical models that can be used in circuit simulators. In this presentation, we demonstrate that the Symmetric Doped Double-Gate Model (SDDGM) can be used for modelling Nanowires and Nanosheets, due to the specific characteristics of these structures and of the model SDDGM. In this paper, 3D TCAD simulations are used to confirm that the total channel width for these structures is equal to the perimeter of the transistor sheet, allowing to extend of the application of the Symmetric Doped Double-Gate Model (SDDGM) model to Nanowires and Nanosheets MOSFETs, with no need to include new parameters. The Model SDDGM is validated for this application using several measured and simulated structures of Nanowires and Nanosheets transistors, with different aspect ratios of fin width and fin height, showing very good agreement between measured or simulated characteristics and modelled. SDDGM is encoded in Verilog-A language and implemented in the SmartSPICE circuit simulator.
T_7 Towards Unified Compact Modeling of RTN (time domain), 1/f Noise (frequency domain) and BTI
Gilson Wirth
Charge trapping produces Random Telegraph Noise (RTN - time domain), 1/f Noise (frequency domain) and Bias Temperature Instability (BTI - aging). A statistical compact modeling framework, based on discrete device physics quantities, is presented. Parameter extraction is addressed, showing that parameters extracted in frequency domain may be used to address time domain behavior, and vice-versa. Not only expected average behavior is addressed, but also the variability, enabling statistical analysis, including corner-based analysis. Electrical (SPICE) level simulation techniques are discussed.

Mini Colloquium

13:30Subramanian S, Iyer Ph.D.Analog in-memory computing using the charge trap transistor
Machine learning and Inference are a significant portion of modern computing. Using conventional processors and accelerators including CPUs, GPUs, and custom ASICs, this computing is very memory intensive with frequent calls to memory which are extremely power hungry. Since the discovery of the memristor, there has been a resurgent interest in analog in-memory compute. Most often, this takes the form of a 1T-1R cell in a cross-point architecture. At UCLA CHIPS, we have been investigating the use of classical CMOS on SOI device used in a somewhat unconventional way. We call this device the Charge Trap Transistor and it’s a regular SOI NFET device whose threshold voltage can be controllably and reversibly changed by self-heating assisted trapping in the HiK dielectric. The device is operated in the subthreshold and a small change in the subthreshold voltage can cause a large change in the sub-threshold drain current. We can show 1000X dynamic range with an effective bit resolution of as much as 5-6 bits. In this talk, we will describe this work, including programming schemes, temperature stability and simple MAC (multiply and accumulate) operations. The CTT is a robust device for in-memory analog compute and promises to enable a viable and resilient edge-based inference engine especially for embedded and IoT applications.
14:30Felix Palumbo Ph.D.Dielectric breakdown in thin dielectrics. From silicon dioxide to layered dielectrics
Thin dielectrics are the fundamental stone over which semiconductor industry experienced its huge development. As the key element for manufacturing Metal Oxide Semiconductor Field Effect Transistors, guaranteeing the reliability of gate oxides has become more challenging with the pushing demands of the markets for improved performance in electronic devices. In this framework, understanding not only the statistics but the physical phenomena behind dielectric breakdown is crucial to ensure the reliability of modern and future electronic devices. In this lecture, the fundamentals of thin dielectric breakdown and the state of the art of breakdown studies on novel materials is summarized, focusing on the physical phenomena that characterize thin film dielectric breakdown and the perspectives on novel 2D materials, that demonstrate remarkable potential to be applied as gate insulators in future nano-electronic devices.
15:30Lluis F. Marsal Ph.D.Efficient and Stable Organic Solar Cells for Versatile Applications
Organic solar cells are considered as a promising renewable energy source because of their light-weight, high transparency, possibility of fabrication in large areas and inexpensive solar energy production. These solar cells are based in the junction of two different organic semiconducting materials, one donor and one acceptor. The most efficient devices to date are the bulk heterojunction cells, obtained from a mixture of the donor and acceptor materials, which provides an enormous interfacial surface.

In the last years, advances in polymer-based organic solar cells have been possible due to different approaches such as design of new structures and synthesis of new materials such as small molecule and polymers with low band-gaps, control of the nanoscale morphology, new interfacial transport layers, variation of the ratio of the donor/acceptor in the bulk heterojunction, application of thermal or solvent annealing process, among others [1-4]. As a result, recently, power conversion efficiencies over 18% are obtained [5]. However, there are still room for improving and some problems should be solved such as the stability, and degradation process of the polymer solar cells [6-7]. In this lecture, we will present the perspectives and recent advances made in polymer solar cells, design and synthesis of new polymers and in particular the active layer morphology, interfacial layers and stability. We will also discuss the basic device operation and various parameters limiting their efficiency and their possible improvements.
16:30Dr. Edmundo A. Gutiérrez D.Cryogenic Energy Efficiency and reliability of 65 nm and 14nm FinFets for Quantum Computing Applications
Although computing requires cryogenic temperatures to operate properly, these days it has become a hot topic, so special attention is required. In this talk I will focus on talking about CMOS technology, and its operation at cryogenic temperatures (4.2 K and below). Various CMOS technologies are being considered for potential use as control and reading systems for in-situ Qubits. That is, the possibility of placing the electronics as close as possible to the Qubits array. However, for this to be possible it is necessary to analyze energy efficiency and electro-thermal coupling.

LAEDC 2022 DAY 1

08:00Registration 7:30 a.m. – 5:30 p.m
08:30Opening Ceremony
Edmundo Gutierrez, PhD., LAEDC Chair

IEEE EDS Welcome
Fernando Guarin, PhD., EDS Senior Past President

Keynote: “Hunting a supermassive black-hole in the center of the Milky Way with the Event Horizon Telescope” David Hughes, PhD.
09:30Coffee Break
Session 1A
Session Chair: Fernando Guarin
Session 1B
2D - Cryogenic
Session Chair: Edmundo Gutierrez
10:0035 - François DannevilleChallenges to measure RF noise and intermodulation performances of mmW/THz devicesTheresia KnoblochScalable and Reliable Gate Insulators for 2D Material-Based FETs
10:3037 - Daniel Tomaszewski, Michał Zaborowski, Jacek Marczewski and Paweł BajurkoField-Effect Transistors as THz radiation detectors119 - Giuseppe IannacconeAnalog neuromorphic circuits using devices based on 2D materials and on CMOS technology
11:0011 - Yunfan Peng and Liguo SunA Compact HMSIW Coupler Based on Slow Wave Structures112 - Enrique G. Marin2DM-based nanoelectronic devices from a multiscale perspective (invited)
11:1517 - Ahmed Alqurashi, James Sexton and Mohamed MissousDevelpoment of 100 GHz resonant tunnelling diodes based oscillator
11:3031 - Palak Srivastava, Km Anjali and Amanpreet Singh SainiDesign Of a Siw Based Slot Antenna For Terahertz Frequency93 - Masayuki Ichikawa, Takahisa Tanaka, Ken Uchida, Tomohisa Miyao, Munehiro Tada and Hiroki IshikuroIn Situ Monitoring Technique of Self-Heating in Bulk MOSFETs at Cryogenic Temperatures using Subthreshold Current
11:4580 - Lucas Nyssens, Martin Rack, Dimitri Lederer and Jean-Pierre RaskinEffect of probe coupling on MOSFET series resistance extraction up to 110 GHz97 - J. Federico Ramirez Rios, Alfonso Pérez Garcia, Mario Moreno Moreno and Alfredo Morales Sánchez2D simulation of the resistive state in bipolar resistive switching memories based on oxygen vacancies
12:0039 - Eduardo Ibarra Medel, Miguel Velázquez, Daniel Ferrusca and Stan KurtzDesign and construction of a Low-Noise L-Band Amplifier for the Tulancingo I radio Telescope.69 - Jairo Méndez-V., Dragica Vasileska,
Katerina Raleva and Edmundo A. Gutiérrez-D.
Modeling Self-Heating Effects in Nanometer SOI
Devices at Cryogenic Temperatures
12:1541 - Omar Jordán-García, Eloy Ramírez-García, David Jiménez and Anibal Pacheco-SanchezLumped model-based analysis of hBN RF switches
Session 2A1
Session Chair: Fernando Guarin
Session 2B
Semiconductor-, MEMS- and Nanotechnologies
Session Chair: Mario Moreno
14:00135 - Cristell ManeuxCircuit Design Flow dedicated to 3D vertical
nanowire FET
12 - Danial Bavi and Sourabh KhandelwalSelf-consistent Compact Modeling of First- and Third Quadrant I-V behavior in SiC MOSFETs
14:3025 - Christoph Jungemann, Maziar Noei and Tobias LinnDevice Simulation of the Dyakonov-Shur Plasma Instability for THz Wave Generation28 - Rituraj S. Rathore, Ashwani K. Rana and Viranjay M. SrivastavaImpact of Oxide Thickness Fluctuation for Resist- and Spacer-Defined FinFETs
14:4530 - Jesús Jiménez-León, Arturo Sarmiento and Pedro Rosales QuinteroAn Electrostatic Compact Model for Experimental Memristive Devices
15:0029 - Pascal Xavier and Tan Phu VuongRF printed electronic devices using bio-sourced materials: risks and opportunities50 - Flávio Enrico Bergamaschi, Gilson I. Wirth, Sylvain Barraud, Mikaël Cassé, Maud Vinet, Olivier Faynot and Marcelo Antonio PavanelloExtraction of the Back Channel Mobility in SOI Nanowire MOS Transistors under Substrate Biasing
15:1568 - Fernando J. Costa, Renan Trevisoli and Rodrigo T. DoriaUltra-Low-Power Diodes Composed by SOI UTBB Transistors
15:30Session 2A2
HAC Workshop
81 - Carlos Ascencio-Hurtado, Alfonso Torres, Roberto Ambrosio, Mario Moreno and Alba Arenas-HernandezEvaluation of the influence of hydrogen dilution ratio and doping on the properties of a-SiGe:H films
15:4591 - Braulio Palacios-Márquez, Zeuz Montiel-González, Sergio Alfonso Pérez-García, Mario Moreno-Moreno and Alfredo Morales-SánchezStudy of the resistive switching behavior in Si/N:SiOx (x<2) multilayer-based MOS devices
Coffee Break & Poster Exhibition
16:00Session 3A
Biomedical Devices
Session Chair: Wilfrido Moreno
92 - Arely Vazquez and Joel MolinaFabrication and characterization of Schottky diodes for application in Schottky barrier MOSFETs
Luis KunDisparities 2022 and the Global Citizen Safety and Security. A Transformational opportunity for Engineers as Systems “Conductors” of Society Critical ThinkingSession 3B
Temperature Dependence
Session Chair: Benjamín Iñíguez
16:155 - Omar López López, Ismael Martínez Ramos, Daniel Durini Romero, Daniel Ferrusca Rodríguez, Edmundo Gutiérrez Domínguez and Adelmo Ortíz CondeParameter extraction in a 65nm nMOSFET technology from 300 K down to 3.8 K
16:309 - Juan Fernando Galindo Jaramillo and Ramon Adrian Salinas FrancoPortable Technology of Low-Cost Image Digitizing for the Screening of Uterine Cancer in Latin America64 - Michelly de Souza, Antonio Cerdeira, Magali Estrada, Sylvain Barraud, Mikaël Cassé, Maud Vinet, Olivier Faynot and Marcelo Antonio PavanelloAnalysis of the Gate-Induced Drain Leakage of SOI Nanowire and Nanosheet MOS Transistors at High Temperatures
16:4586 - Loukas Chevas, Nikolaos Makris, Maria Kayambaki, Thanasis Kostopoulos, Antonis Stavrinidis, George Konstantinidis and Matthias BucherA Contribution to GaN HEMT Modeling and Parameter Extraction Including Temperature Dependence
17:00104 - Camila Alves, Michelly de Souza and D'Oliveira LigiaComparative Analysis of Transcapacitances in Asymmetric Self-Cascode and Graded-Channel SOI nMOSFETs
17:15114 - Shruti Pathak, Asifa Amin, Purushothaman Srinivasan, Fernando Guarin and Abhisek DixitImpact of Chuck Temperature on Flicker Noise (1⁄f) Performance of PDSOI n-channel MOSFETs (Invited)
108 - Anuj Bhardwaj, Sujit Singh, Anand Mishra,
David Petit, Francois Paolini and Abhisek
Effect of Negative Back Bias on FDSOI Device
Parameters down to Cryogenic Temperature
17:30Keynote: “Invention of the Transistor 75 years ago; The Origin of Device Miniaturization towards Super-Intelligent Society”
Hiroshi Iwai, PhD
18:30Cocktail Reception
Panel session and networking
Young Professionals and Women in Engineering

IEEE HAC Keynote Talk/workshop: "Leading the global frontiers of technologies in solving sustainable development challenges"

July 4th - 15:30

Sampathkumar Veeraraghavan, Global Chair, 2021 – 2022 IEEE Humanitarian Activities Committee

Biography: Sampathkumar Veeraraghavan is a globally renowned technologist best known for his technological innovations in addressing global humanitarian and sustainable development challenges.  He is a seasoned technology and business leader with over 17 years of experience in the Top 500 Fortune companies. Throughout his career, he has led business-critical strategic  R & D programs and successfully delivered cutting-edge technologies in the areas of Conversational Artificial Intelligence (AI), Natural Language Understanding, Cloud computing, Data privacy, Enterprise systems, Infrastructure technologies, Assistive and Sustainable technologies that were targeted to benefit millions of global users. Sampath served as an expert in the 2020 Broadband Commission working group on school connectivity co-chaired by UNESCO, UNICEF, and ITU to drive “GIGA,” a Global School Connectivity Initiative. He is the founder and president of “The Brahmam”.

His technological innovations and leadership excellence were featured in cover stories of global media such as IEEE TV, IEEE spectrum, USA today, E-week, AI-news, IEEE Institute, and IEEE transmitter, The Bridge, and ACM-News. He received an M.S. degree in Electrical Engineering from Tufts University, Massachusetts, USA (2010) and a B.E. degree in Computer Science and Engineering from Anna University, India (2005). He is accredited with leading and delivering some of the industry-first programs in Artificial intelligence and computing technologies across multi-disciplinary domains. He currently works as a senior technology and program management leader in the conversational Artificial Intelligence industry where he spearheads a portfolio of science and engineering programs to advance spoken language innovations.

LAEDC 2022 DAY 2

08:30Session Chair: Edmundo Gutierrez

Keynote: “Chips, dies, chiplets and dielets and heterogeneous integration”
Subramanian Iyer, PhD.
09:30Coffee Break
Session 4A
Semiconductor reliability
Session Chair: Fernando Guarin
Session 4B
Circuit-device interaction
Session Chair: Lionel Trojman
10:0058 - Fernando Guarin and Purushothaman SrinivasanPractical Considerations and methodology for the reliability evaluation of 5G SOI Technologies (Invited)116 - Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Michiel Vandemaele, Erik Bury, Robin Degraeve and Ben KaczerDedicated ICs for the Characterization of Variability and Aging Studies and their Use in Lightweight Security Applications
10:3020 - Sebastian Matias Pazos, Fernando Leonel Aguirre, Felix Palumbo and Fernando SilveiraReliability-Aware Design Space Exploration for Fully Integrated RF CMOS PA8 - Alejandro David Martinez RojasFront-End electronics to read out thin Ultra-Fast Silicon detectors for ps resolution FAST3
10:4554 - Manuel Almada, Federico Sandoval and Rodolfo SanchezIntegrated NMOS Differential Amplifier
11:0061 - Fernando SilveiraReliability Aware Design of RF Circuits82 - Silvana Guitarra, Lionel Trojman, Laurent Raymond and Martín GavílanezAnalysis of the reset transition in bipolar HfO2- based ReRAM to improve modeling accuracy
11:1590 - Silvestre Salas-Rodríguez, Jaime Martínez-Castillo and Joel Molina-ReyesOptimization of a-SiGe:H Thin Film Transistors whit HfO2 as gate insulator by TCAD simulations
11:3057 - Gerardo Malavena, Jurij Lorenzo Mazzola, Matteo Greatti, Christian Monzio Compagnoni, Andrea Leonardo Lacaita, Vincenzo Marano, Michele Lauria, Dario Paci, Fabrizio Speroni and Alessandro Sottocornola SpinelliInvestigation of the Statistical Spread of the Time-Dependent Dielectric Breakdown in Polymeric Dielectrics for Galvanic Isolation94 - Ricardo Bolanos-Perez, Alejandro Diaz-Sanchez, José Miguel Rocha-Perez, Jaime Ramirez-Angulo, Alejandro Bautista and Pedro Isaac Morales-LopezLow Voltage and Low Power AC Coupled Instrumentation Amplifier
11:45101 - Daniel Flores, Cinthia Irias and Daniel MartínezModular design of the Digital Control and Measurement System of a Falling Weight Deflectometer
12:0027 - Shivendra K. Rathaur, Tsung-Ying Yang, Chih-Yi Yang, Edward Yi Chang, Heng-Tung Hsu and Abhisek DixitTime-dependent Multiple Gate Voltage Reliability of Hybrid Ferroelectric Charge Trap Gate Stack (FEG) GaN HEMT for Power Device Applications
12:1544 - Carlos Alfredo Pelcastre Ortega and Mónico Linares ArandaAn alternative radiation hardened by layout design in a CMOS technology
Session 5A
Novel materials and process modules
Session Chair: Arturo Escobosa
Session 5B
Modeling and simulation
Session Chair: Benjamín Iñíguez
14:0066 - Radu A. SporeaDesign routes toward optimal contact-controlled thin-film transistorsLionel TrojmanThe III-V materials as new perspective for the
electronic power applications:
the specific case of the Energy Harvester system
14:30103 - Marco Fattori and Eugenio CantatoreFlexible sensing surfaces based on printed electronics4 - Shubhankar Sharma, Yi Zheng and Hiu Yung WongShort Circuit Ruggedness of Trench Filled Superjunction Devices
14:4514 - Antonio Cerdeira, Magali Estrada, Genaro da Silva, Jaime Rodrigues and Marcelo PavanelloModeling of silicon stacked nanowire and nanosheet transistors at high temperatures
15:00115 - Wei Zhao, Subimal Majee and Abhilash SugunanAn Eco-friendly graphene ink for inkjet printing15 - Andres Felipe Jaramillo Alvarado, Pedro Rosales Quintero, Alfonso Torres Jacome and Francisco Javier De la Hidalga WadeNonlinear Applications, State Equations and Simulations for Piezoelectric Materials
15:1516 - Malte Koch, Hsing Tseng, Anton Weissbach, Benjamin Iniguez, Karl Leo, Alexander Kloes, Hans Kleemann and Ghader DarbandyNumerical Modeling of Organic Electrochemical Transistors
15:307 - Israel E. Zapata De Santiago and Alfonso Torres JacomeTest structures for ZT thin-film thermoelectric characterization using laser as a heat source18 - Priyanshi Goyal and Harsupreet KaurExploring the suitability of Dual Step Gate Oxide Design on β – Ga2O3 MOSFET for High Power Microwave Applications – Part I
15:4567 - Ananya Bhattacharjee and Ratul Kumar BaruahElectrical Performance of Fractal Web as Flexible Interconnects48 - Viswanathan Naveen Kumar, Dragica Vasileska and Michael PovolotskyiModeling Alloy Clustering Limited Low-Field Electron Mobility in GaN FinFETs
Coffee Break & Poster Exhibition
Session 6A
Novel materials and process modules
Session Chair:
Lluis Marsall
Session 6B
Panel session in Humanitarian Technology
Session Chair: Mario Aleman
16:0062 - Khoirom Johnson Singh, Lomash Chandra Acharya, Mahipal Dargupally, Anand Bulusu and Sudeb DasguptaPost-CMOS Devices: Landau’s Anisotropy Sensitivity Analyses for Organic Ferroelectric Gate Stack and Its Application to NCTFETInvited Panelists:

+ Pritpal Singh, PhD
+ Sampath Veer.
+ Morgan Kiani, PhD
+ Luis Kun, PhD
16:3098 - Alba Arenas-Hernandez, Carlos Zuñiga, Alfonso Torres Jacome, Mario Moreno, Julio César Mendoza Cervantes, Carlos Roberto Ascencio-Hurtado and Abdu Orduña-DíazChemical polishing of titanium foil and detachment of TiO2 nanotubes as key synthesis parameters to gas sensing applications
16:4599 - Cesar de Jesus Alarcon-Hernandez, Alba Arenas-Hernandez, Abel Garzon-Roman and Carlos Zuñiga-IslasComparison of TiO2 nanoparticles and [email protected] core-shell nanostructures and their photocatalytic activity
17:00107 - Juan Ponce-Hernández, Antonio Estrada-Torres, Eloy Rodriguez-Vázquez and Victor S. BalderramaOn-Line PEM Fuel Cell Hydration Marker Based on Frequency Response Analysis
17:30Keynote: “Recent Developments and Future Trends in Solar Photovoltaics”
Martin Green, PhD
19:00Dinner Gala - 7pm
Best Paper Award

LAEDC 2022 DAY 3

08:30Session Chair: Edmundo Gutierrez

“OTFT neuro-inspired circuits for classification tasks”
Laurie E. Calvet, PhD.

“Integrating new technology elements to enable a 4000+ qubit quantum computer”
Ricardo Donaton, PhD.

09:30Coffee Break
Session 7A1
Electron Devices for Quantum Computing
Session Chair: Edmundo Gutierrez
Session 7B
Technology roadmaps
Session Chair:
Mario Aleman
10:00123 - Ricardo DonatonIntegrating new technology elements to enable a 4000+ qubit quantum computer - INVITED131 - Ali Shiri Sichani, Kishore Kumar Kadari and Wilfrido A. MorenoEfficient Signaling for Passive Memristive Crossbars to Prepare them for Spiking Neuromorphic Computing
10:30Stefan van WaasenHow to build a universal quantum computer? – The
scaling challenge
32 - Esteban A. Sanabria Villalobos, Luis A. Chavarría Zamora and Leonardo Araya MartínezA Novel Proposal for a Standalone Compressor and Decompressor Hardware Module from ISA
10:4533 - Anika Zaman and Hiu Yung WongStudy of Error Propagation and Generation in Harrow-Hassidim-Lloyd (HHL) Quantum Algorithm34 - Roberto Pereira Santos and Luis Alberto Chavarria ZamoraDevelopment of a UAV system for estimation of structure from movement for a random target
11:0085 - Joel Molina-ReyesALD for Advanced Logic, Memory, Sensing and Quantum Technologies40 - Ernesto Franco and Alfonso TorresHigh electrical conductivity of P type a-SiGe:H films deposited by PECVD
11:15102 - Harsaroop Dhillon and Hiu Yung WongSimulation of Single-shot Qubit Readout of a 2-Qubit Superconducting System with Noise Analysis75 - Luis Alberto Esperanza Hernandez and Victor Rodolfo Gonzalez DiazAlgorithm for ECG Signal Delineation through Delta-Sigma Modulation
– Session 7A2 – Computational Electronics – Session Chair: Edmundo Gutierrez
11:30Dragica VasileskaComputational Electronics: An Overview78 - Laura Vanesa De Arco Barraza, Maria José Pontes, Marcelo Eduardo Vieira Segatto, Maxwell E. Monteiro, Carlos A. Cifuentes and Camilo A. R. DíazOptical Fiber Angle Sensors for the PrHand Prosthesis: Development, and Application in Grasp Types Recognition with Machine Learning
11:4588 - Marcos Reich, Anselmo Frizera and Camilo Arturo Rodríguez DíazApproximate modelling based on genetic algorithm for a POF force sensor for Human-Robot Interaction in Robotic Walker
12:00Allan GranadosSystem modeling using GO and KPN networks89 - Ignacio Marín Aguilar, Luis Alberto Chavarrıa Zamora and Leonardo Araya MartinezA practical approach to validate the authenticity of identity documents
Session 8A
Optoelectronics, photovoltaic and photonic devices, and systems
Session Chair: Lluis Marsall
Session 8B1
All electron-based devices
Session Chair: Stefan van Waasen
14:001 - Enas Moustafa, Josep Pallares and Lluis MarsalDependency of Current Generated Upon Thermal Treatment Duration in Non-fullerene Organic Solar CellsGilson WirthThe role of the observation window on the intra- and inter-device variability of RTN
14:1523 - Benisha Chris A and Somyaranjan RoutrayPerformance Analysis in Kesterite CZGS/CZGSe Quantum Wells towards high-Efficiency Photovoltaic Applications
14:3026 - Shibi Varku, S Routray and K P PradhanContribution of Carrier Quantization Effect towards Performance of Nanostructured CFTS / CFTSe Solar Cells43 - Hans Kleemann, Amric Bonil, Juan Wang and Ghader DarbandyVertical Organic Transistors - Approaching the GHz-Threshold with Organic Devices
14:4549 - Mariano Aceves-Mijares, Xochilt Luna-Zempoalteca, Felix Aguilar, Denise Estrada-Wiese and Alfredo González-FernándezStudy of the effect of the aluminum gate on light absorption in a Wavesensor45 - Edmundo Gutierrez, Alan Otero and Xiomara Riberon-MOS transistor impact ionization boosted by cumulative stress degradation in a 250 nm SiGe BiCMOS technology
15:0077 - Magaly Ramírez-Como, Enas Moustafa, Alfonsina Abat Amelenan Torimtubun, José G. Sánchez, Josep Pallarès and Lluis F. MarsalPreliminary Study of the Degradation of PM6:Y7 based Solar47 - Roberto Lacerda de Orio, Johannes Ender, Simone Fiorentini, Wolfgang Goes, Siegfried Selberherr and Viktor SverdlovAbout the Switching Energy of a Magnetic Tunnel Junction determined by Spin-Orbit Torque and Voltage-Controlled Magnetic Anisotropy
Session 8B2 – Sensors and actuators – Session Chair: Stefan van Waasen
15:1583 - Mario Moreno, Daniel Ferrusca, Jose de Jesús Rangel, Jorge Castro, Julio Hernández, Ricardo Jiménez, Alfonso Torres, Arturo Ponce, Alfredo Morales, Rodrigo González, Eduardo Mota and Gabriela AmadorTowards an infrared camera based on polymorphous silicon-germanium microbolometer arrays21 - Enrique Prieto, Luis Abad, Antonio Cerdeira, Magali Estrada and Benjamín IñiguezSensor readout circuit using AOSTFTs, for IGZO (In-Ga-ZnO) sensors
15:3056 - Diego Fernando Valencia Grisales and Claudia Reyes BetanzoDesign of a Thermal Microsensor for Air Flow Rate with Low Power Consumption and High Sensitivity
Coffee break
Session 9A
All electronbased devices
Session Chair:
Patricia Guzmán
16:0096 - Jesús Miguel Germán-Martínez, Alfredo
Morales-Sánchez, Braulio PalaciosMárquez and Mario Moreno-Mo
Study of the photoresponse of ITO/SiO2/Si/SiO2/Al
MIS capactior structures
16:1570 - Stepan Petrosyan, Varsenik Khachatryan
and Ashkhen Yesayan
Nanowire Array Solar Cells
16:3071 - Oscar Velandia, Mario Moreno, Ricardo
Jiménez, Alfredo Morales, Alfonso Torres
Jacome, Carlos Zúñiga, Pedro Rosales
Quintero, Luis Hernandez and
Netzahualcoyotl Carlos
Hydrogenated amorphous silicon germanium films
doped with nitrogen (a-SiGe:H,N) to improve the
long-wave infrared (LWIR) region absorption
16:4572 - Aura Ximena González Cely, Teodiano
Freire Bastos-Filho and Camilo Arturo
Rodríguez Díaz
Wheelchair posture classification based on POF
pressure sensors and machine learning algorithms
17:0073 - Francisco Javier Martinez-Rodriguez,
Aldair Lara Tenorio, Rodriguez Sanchez
Jorge, Alejandro Bautista-Castillo and José
Miguel Rocha-Pérez
The Flipped Voltage Follower as a SuperRegenerative Receiver for Internet of Medical Things
17:1574 - Braz Baptista Junior, Maria Gloria Cano de
Andrade, Luis Felipe de Oliveira
Bergamim, Carlos Roberto Nogueira,
Renan Baptista Abud and Eddy Simoen
Temperature Dependence of AlGaN/GaN High
Electron Mobility Transistors on 200 mm Si wafers
18:30Closing Ceremony