Power system packaging through heterogeneous integration and advanced components

  1. Instructor Team

Douglas C Hopkins (North Carolina State University)  and P M Raj (Florida International University)

  1. Abstractar

Emerging AI and deep-learning demands computing power that exceeds 10 kW to processors of cm2 footprint. At the IC level, interconnect densities will scale down to  sub-micron pitch where the off-chip interconnect densities exceed Million I/Os per mm2. To cope up with the power, thermal solutions should reach resistances of <0.3 mm2 W/K.  Advances in package integration are the key enablers for  next-generation power delivery with higher power densities that exceed 5 A/mm2, efficiency and reliability. On the other hand, power electronics in the automotive world is diversifying to address various subsystem needs such as main and auxiliary inverters, DC-DC converters, on-board chargers and others, creating new challenges for meeting the density and reliability needs. This tutorial will focus on such  key packaging  building blocks:  a)design for performance, manufacturing and reliability that relies on heterogeneous functional integration of wide bandgap devices, drivers, isolators and protection circuits to result in intelligent power modules, b) stacked or embedded packaging through direct plated interconnects onto die interfaces, c) thermal management through double-sided cooling with integrated fluidics, d)high-density passive components such as capacitors, transformers, inductors  for integration in planar and 3D architectures. Specific emphasis will be on recent innovations and their origins in fundamental engineering sciences.

  1. Duration of Tutorial : 3 hours


  1. Tutorial Outline
  • Power packaging drivers in computing and automotive;
  • Topology advances;
  • System and packaging architectures;
  • Components and integration advances;
  • Multiphysics modeling to reliability qualification;
  • Key recent breakthroughs;


  1. Tutorial format and Required Material

Projector, computer with USB or internet connection


  1. Instructor Biographies:


Professor Hopkins has been with the ECE Department since 2011, is Director of the Laboratory for Packaging Research in Electronic Energy Systems (PREES), part of the FREEDM Systems Center, and is an affiliate faculty with the Center for Additive Manufacturing and Logistics (CAMAL). He received his Ph.D. from Virginia Tech (1989). He has held Visiting Faculty appointments with the Army, NASA, Lawrence Livermore, and the Ohio Space Institute, was a reviewer with the Nat’l Academy of Science. His early career was at the R&D centers of General Electric and Carrier Air-Conditioning companies, and has had numerous consulting projects with Emerson, Grundfos, Eaton, and Verizon among others. He co-founded DensePower, LLC as president and CTO, and has published over 200 journal and conference articles, and conference tutorials and workshops. Dr. Hopkins founded/cofounded the: IEEE EPS/PELS joint Power Packaging Committee (1994), Int’l Wksp on Integrated Power Packaging (IWIPP, 1998), IEEE/IMAPS/PSMA “Int’l Symp. on 3D Power Electronics Integrations and Manufacturing” (3D-PEIM, 2016), and the IMAPS “International Symposium on Advanced Power Electronics Packaging (APEPS, 2021). He received the IMAPS Outstanding Educator Award (2013), is an IMAPS Fellow (2007) and member of the IMAPS Executive Council (2019-). He also chairs the EPS Power & Energy TC (2022-).


Dr. P. M. Raj‘s expertise is in packaging of electronic and bioelectronic systems. He is an is an Associate Professor at Florida International University. He co-led several technical thrusts in electronic packaging, working with the whole electronic ecosystem, which includes semiconductor, packaging, material, tool, and end-user companies. He is widely recognized for his contributions in integrated passive components and technology roadmapping, component integration for bioelectronic, power and RF modules, and also for promoting the role of nanomaterials and nanostructures for electronics packaging applications, as evident through his several industry partnerships, invited presentations, publications and awards. His research led to 360 publications, which include >100 journal papers, 20 book chapters and 16 articles in widely circulated technology magazines, ~215 conference publications, and 8 patents. His work received more than 25 best-paper awards. He is an Associate Editor for IEEE CPMT transactions and IEEE Nanotechnology magazine, and the Co-Chair for the IEEE nanopackaging technical committee since 2014. He served as the IEEE Distinguished Lecturer from 2020-2022, and General Chair for 3D Power Electronics Integration and Manufacturing in 2023. He earned his BS (1999) from Indian Institute of Technology, Kanpur), ME (1995) from (Indian Institute of Science, Bangalore) and PhD (1999) from Rutgers University, New Jersey.