The Advance Program for REPP 2022 will be posted at the end of September; please join our IEEE ListServ Dlist, to receive information.
The 2021 program is below, along with links to each talk’s slides and the edited video. You many also view on-demand videos of talks from REPP’20.
FINAL PROGRAM for 2021 – View videos of talks of interest, on IEEE.tv
|Speaker and links||Title/Summary|
|Welcome to REPP: Kitty Pearsall, EPS President-Elect
Slides: Video: (14:01)
|Plenary Talk: Prof. Kouchi Zhang, University of Delft
Slides: Video: (52:32 plus Q&A)
|Making Digital Twins Work
Driven by the ever-increasing societal needs for digitization and intelligence, such as autonomous driving, Manufacture 4.0, “Smart-X”, and “AI in all”, the demands for mission-critical electronics components and systems … [more]
|Richard Rao, Marvell
Slides: Video: (1:13:02)
|Workshop: Heterogeneous Integration Roadmap: Reliability – Intro (Richard Rao, EPS TC-Reliability Chair); HIR Overview (Bill Chen, ASE, HIR Co-Chair); Modeling/Simulation (Prof. Xuejun Fan, Lamar Univ); Ensuring Reliability (Prof. Abhijit Dasgupta, U-Md); Q&A (Richard Rao)|
|Prof. Albert Wang, University of California, Riverside
Video: (1:00:13 + Q&A)
|Cross-Layer ESD Protection Designs: Chips, Packaging and Systems
Heterogeneous integration comes with new challenges to ESD protection. This talk gives a hierarchical review of ESD protection designs for modern electronics: on-chip ESD protection designs, and new cross-layer ESD protection designs at chip, module, package and system levels. The presentation covers recent developments in novel ESD protection concepts.
|Antai Xu, Senior Director of Reliability Engineering, Xilinx
Slides: Video: (57:53 + Q&A)
|Random Failure Reduction: Strategy for Advanced Semiconductor Device Production
As Si processes enter nano and atomic scales, integrating semiconductor devices into SiPs has become an important technology to extend product roadmaps. On the center stage of this progress, product reliability performance provides a measuring criterion … [more]
|Prof Hongbin Yu, Arizona State University
Slides: Video: (27:40 + Q&A)
|Strain and Surface Warping Detection of Interconnect Microstructures via Laser Diffraction|
|Ephraim Suhir, Portland State University
Slides: Video: (21:44)
|Avoiding Inelastic Strains in Solder Joint Interconnections of IC Packages
Merits, attributes and challenges associated with the application of analytical predictive modeling in electronics and photonics packaging reliability engineering are addressed. The emphasis on some practically important, yet paradoxical, i.e., intuitively non-obvious, materials and structural behaviors. It is concluded that three basic approaches in microelectronics and photonics materials science and engineering – analytical (“mathematical”) modeling, numerical modeling (simulation) and experimental investigations – are equally important in understanding the physics of the materials behavior and in designing viable and reliable electronic devices and products.
|Dandan Lyu, Wei Hu, Xiaofei Pan, C. T. Wu, ANSYS
|Introduction of ISPG Method and Geometric Multiscale Modeling for Electronics Solder Reflow and Shock Wave Analysis
A multiscale computational approach for linking the information of mesoscale dissimilar solder ball geometries to the macroscale drop shock of a PCB is developed. Numerical examples demonstrate that the proposed implicit ISPG formation is able to accurately and efficiently predict the solder reflow profile.
|Jason Zhang, Intel
Slides: Video: (28:07)
| Advanced Package Technologies and their Reliability Challenges
Intel invented two disruptive technologies — the Embedded Multi-die Interconnect Bridge (EMIB) family and the Foveros family — which enabled higher I/Os/mm, higher signal integrity and low cost. This presentation details the two technologies, their challenges and solutions.
|Jinsung Youn, Hewlett-Packard Enterprise
Video: (24:20 + Q&A)
|Co-Design Methodology for Reliable 3D-Integrated DWDM Silicon Photonics
To achieve high aggregate bandwidth with lower latency and better energy efficiency, a dense wavelength division multiplexing (DWDM)-based Silicon Photonics (SiPh) is being considered as a key enabler in data centers and high-performance computing system applications. In particular, to develop a reliable DWDM SiPh system, multi-physics design and simulation with electromagnetic, thermal, and optical are strongly required as optical characteristics of thermally-sensitive photonic devices such as ring resonators and photodetectors can be affected. In this talk, we present signal and power integrity (SI/PI) and thermal-aware photonic simulation for a 3D-integrated DWDM SiPh system.
|Amogh Shejwal, ANSYS
|Analysis of Flexible PCBs: Trace Reinforcement Approach|
|Kitty Pearsall, EPS President-Elect
Slides: Video: (41:45 + Q&A)
|Plenary Talk: Do You Know What’s Hiding in Your Supply Chain? – The electronics packaging industry electronics has shifted away from monolithic systems that were prevalent in the IT dominated space, to the consumer-focused realm where compute has become pervasive. This results in more complex supply chain dynamics. Key factors for this shift … [more]|
|Artemisia Tsiara, imec Reliability Group
Video: (36:56 + Q&A)
|Overview and Challenges of Silicon Photonics Device Reliability
We faced 3 different questions related to a) technology – does the device meet the reliability criteria at all, b) methodology – what tests do we need to perform and c) physics-of-failure – how do the devices degrade? We cover photodetectors, modulators, and heaters, to determine factors for reliability.
|Rainer Dudek, Fraunhofer ENAS
|Thermo-mechanical Analyses on Mounted Flip-Chip BGA Applicable in High Performance Vehicle Computers|
|Daniel Riegel, Bosch
Video: (22:05 + Q&A)
| Correlation Between Delamination and Solder Joint Fatigue of QFN Package
Delamination between surfaces in the package can impact the lifetime of solder joints, as established by destructive failure mode analysis like cross-sections or dye-and-pry. Non-destructive failure mode analysis with scanning acoustic microscope (SAM) allows detection of delamination but not cracks in the solder joints. We use on-chip stress sensors to detect delamination in-situ and formulate the goal to link this information to the remaining useful life of solder joints.
|Nan Wang, Cisco Systems
Video: (37:45 + Q&A)
|Silicon Photonics: Integration, Reliability Challenges and Future Requirements
|Fen Chen, GM Cruise
Video: (45:09 + Q&A)
|In-Vehicle Display Technology Development and Challenges
There is a need for displays with better visibility, brightness, viewing angle, resolution, sharpness, and reliability together with larger size and free-form that offer unobtrusive visual information. Superior display with touch technologies can enable a safe, informative, and comfortable driving or riding experience. Failure modes are shown. In-vehicle display technology is discussed and will continue evolving.
|Michael Liu, JCET Group
|Testing Heterogeneous Integration and Supply Chain Implications|
|Farid Soroush, Stanford University
Video: (15:40 + Q&A)
|Micro Pillar Support Structure for Mechanical Reliability of Silicon Ultra-Thin Vapor Chambers
The bare cavity design in conventional vapor chambers is not capable of providing the required mechanical reliability. An array of silicon micro pillars increases the mechanical reliability of a silicon vapor chamber under high operating pressure and chip bonding pressure. A numerical model for the mechanical stress analysis of the device is developed, mesh independence has been studied, and 4 design iterations have been investigated. The critical point of the final design is found.
|Prof. Tan Cher Ming, Chang Gung University
Video: (27:10 + Q&A)
|Invited Talk: Degradation Mechanism of High Power LED Packaging in Outdoor Environment and its Acceleration Model|
|Prof Shuye Zhang, HIT
Video: (11:06 + Q&A)
| Shear Performance and Accelerated Reliability of 6×6 mm2 FOWLP Solder Joints using an ENIG PCB Electrode
In this study, we designed a PCB and FOWLP test vehicle with a ENIG surface finish. After optimizing from 21 bonding parameters (temperature, holding time and shear strength), the best bonding parameter was achieved. We conducted accelerated pressure cooker test and measured the solder joint morphology, shear strength and failure modes.